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| Related articles |
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| Cray-2 Fast Memory delano@cs.berkeley.edu (1993-05-13) |
| Re: Cray-2 Fast Memory grout@sp90.csrd.uiuc.edu (1993-05-14) |
| Re: Cray-2 Fast Memory desj@ccr-p.ida.org (1993-05-26) |
| Re: Cray-2 Fast Memory jrbd@craycos.com (1993-05-26) |
| Re: Cray-2 Fast Memory desj@ccr-p.ida.org (1993-05-27) |
| Re: Cray-2 Fast Memory jac@moonshine.llnl.gov (1993-05-31) |
| Newsgroups: | comp.compilers,comp.sys.super |
| From: | delano@cs.berkeley.edu (Patrick Delano) |
| Keywords: | architecture, question |
| Organization: | UC Berkeley CS Dept. |
| Date: | Thu, 13 May 1993 23:09:09 GMT |
Apparently the Cray-2 had a fast memory that unlike cache memory was
explicitly managed by the compiler. Can anyone tell me what software
techniques were used, or point me to some references?
Thanks,
Patrick
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